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J. Hefei Univ. Tech. (Nat. Sci.)

合肥工业大学学报(自然科学版)

JOURNAL OF HEFEI UNIVERSITY OF TECHNOLOGY (NATURAL SCIENCE)

Competent Authorities: Ministry of Education of the People's Republic of China

Sponsor by: Hefei University of Technology

ISSN 1000-1646, CN 34-1001/N

Hardware accelerator for solving large-scale BBDF sparse matrix

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大规模 BBDF 稀疏矩阵求解硬件加速器

Journal Information

J. Hefei Univ. Tech. (Nat. Sci.), May.2025, Vol.48 No.5: 614-621

DOI: 10.3969/j.issn.1003-5060.2025.05.006

Authors

ZHANG Duoli, SUN Heyun, HU Rui

(School of Microelectronics, Hefei University of Technology, Hefei 230601, China)

Abstract and Keywords

Abstract: Aiming at the problems of limited acceleration effect and large memory consumption of existing power system simulation equation solving, this paper completed the design of large-scale bordered block diagonal form (BBDF) sparse matrix solver. Using the stable biconjugate gradient iteration method, block calculation is carried out based on the block diagonal edge feature of the power system equation. A coefficient matrix nested row compression storage strategy is proposed, which significantly reduces the storage access burden and memory occupation during the calculation process. The algorithm tasks are optimized and the algorithm execution time is reduced. By utilizing reconfigurable technology, similar combination calculations from multiple tasks and the same calculations from a single task are dynamically allocated to the same computing circuit, forming a multi-level reusable foldable computing structure, achieving efficient utilization of solver computing resources. Multiple methods such as paralleling and pipelining are used to explore parallelism and accelerate equation solving. The experimental results show that the solver supports the solution of large-scale sparse linear equations with block diagonal edge features for multiple coefficient matrices, and achieves an acceleration ratio of 30-32 times with less hardware resources compared to existing work.

Keywords: bordered block diagonal form(BBDF); biconjugate gradient stabilized(BiCGStab) algorithm; nested row compression storage; folding technology; reconfigurable technology; field programmable gate array (FPGA)

作者信息

张多利，孙贺云，胡锐

（合肥工业大学微电子学院，安徽合肥230601）

摘要和关键词

摘要: 针对现有电力系统仿真方程求解加速效果有限、内存消耗大等问题, 文章设计并完成了一种大规模分块对角加边形式(bordered block diagonal form, BBDF)稀疏矩阵求解器。采用稳定双共轭梯度迭代法, 根据电力系统方程的分块对角加边特征进行分块计算, 提出系数矩阵嵌套行压缩存储策略, 显著降低计算过程中的存储访问负担和内存占用; 优化算法任务, 缩减算法的执行时间; 利用可重构技术将多个任务中相似的组合计算、单个任务中相同的计算动态分配到同一计算电路, 形成多层级复用的折叠式计算结构, 实现求解器计算资源的高效利用; 采用并行、流水等多种方法挖掘并行度, 加速方程求解。实验结果表明, 该求解器支持多种系数矩阵具有分块对角加边特征的大规模稀疏线性方程组的求解, 相较于已有工作, 能以更少的硬件资源收获30~32倍的加速比。

关键词: 分块对角加边形式(BBDF)；双稳态共轭梯度(BiCGStab)算法；嵌套行压缩存储；折叠技术；可重构技术；可编程门阵列(FPGA)

Funding

国家自然科学基金资助项目（61874156）；安徽省高校协同创新资助项目（GXXT-2019-030）

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