Research on the improvement of LCDU by dry etching process

Journal Information

J. Hefei Univ. Tech. (Nat. Sci.), Aug. 2026, Vol. 49 No. 8: 1047-1052, 1074

DOI: 10.3969/j.issn.1003-5060.2026.08.007

Authors

XU Xiangsheng $ ^{1} $, WANG Li $ ^{1} $, XIE Ting $ ^{2} $

(1. School of Microelectronics, Hefei University of Technology, Hefei 230601, China; 2. Advanced Micro-Fabrication Equipment Inc. China, Shanghai 201201, China)

Abstract and Keywords

Abstract: At present, 5G communication, augmented reality, virtual reality, Internet of Things, new energy vehicles and other fields are developing rapidly, which depend on storage technologies, and the demand for storage is also growing. When dynamic random access memory (DRAM) sizes are scaled down to 20 nm, DRAM memory arrays face significant scaling challenges, and local critical dimension uniformity (LCDU) is particularly important in this context. This paper primarily focuses on optimizing LCDU by the dry etching process in litho-etch-litho-etch (LELE) using domestic equipment. The research results show that the combination of in-situ deposition, asynchronous etching, and asynchronous in-situ deposition and etching can significantly reduce the normalized LCDU after etching from 21.2% to 7.7%, which is 2.3% lower than that of the original American tool, laying a solid foundation for the improvement and cost reduction of DRAM core structural testing and wafer testing and boosting confidence in the development of domestic equipment.

Keywords: in-situ deposition; in-situ deposition and etching; asynchronous pulsing; local critical dimension uniformity(LCDU); dry etching

作者信息

许向生 $ ^{1} $，王莉 $ ^{1} $，谢婷 $ ^{2} $

(1. 合肥工业大学微电子学院，安徽合肥 230601；2. 中微半导体设备（上海）股份有限公司，上海 201201)

摘要和关键词

摘要: 当前5G通信、增强现实、虚拟现实、物联网、新能源汽车等领域发展迅猛,这些应用均依赖存储技术的支撑,对存储的需求也在不断增长。当动态随机存取存储器(dynamic random access memory, DRAM)尺寸缩小到20 nm时,其存储阵列将面临巨大的微缩挑战,局部关键尺寸均匀性(local critical dimension uniformity, LCDU)在此情况下尤为关键。文章主要利用国产机台研究光刻-蚀刻-光刻-蚀刻(litho-etch-litho-etch, LELE)工艺中的干法蚀刻工艺对LCDU的优化效果。研究结果表明,结合原位沉积、异步蚀刻与异步原位沉积蚀刻可以将蚀刻后的归一化LCDU从21.2%显著降低至7.7%,与原有的美系机台相比降低了2.3%。该结果为DRAM管芯结构性测试和晶圆测试的改进及成本降低奠定了坚实的基础,并为本土化设备的研究提供了极大的信心。

关键词: 原位沉积；原位沉积蚀刻；异步脉冲；局部关键尺寸均匀性（LCDU）；干法蚀刻

Funding

国家自然科学基金资助项目（62074048）

合肥工业大学学报(自然科学版)

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