Abstract: With the continuous increase in the number of integrated cores on multi-core processors, the scheduling of parallel tasks has increasingly become a key factor restricting performance improvement. This paper designs a dynamic task scheduling controller for heterogeneous multi-core computing systems, which mainly realizes the functions of dynamic monitoring of the load of the processing unit, dynamic task wake-up, out-of-order task issue, task write-back security management and other functions. This paper studies a method to reduce the times of the result of a computing task written back to the double data rate (DDR) external memory, which greatly saves the memory access overhead and further improves the calculation performance. Simulation and performance tests show that in typical application scenarios, compared with the existing task issue controller without dynamic scheduling function, it has realized the transition from explicitly parallel programming to task parallel automatic control, and the programming friendliness is significantly improved. In different cases, the computing performance was improved by 11.3% to 37.9%.
Keywords: heterogeneous multi-core processor; dynamic task scheduling; out-of-order multiple issue; programming friendliness; on-chip network; on-chip node cache
合肥工业大学学报自科版