Curve25519 点乘算法的高效 FPGA 实现

为了提高 X25519 密钥交换算法的运算效率,文章基于现场可编程门阵列(field programmable gate array, FPGA)提出一种高效的曲线 Curve25519 的点乘设计方案。首先在底层的有限域计算上,针对模约减计算次数多的问题,提出一种基于冗余数的模运算单元,减少了约减次数;同时,所提出的结构可以减少点乘中常系数乘法的运算周期,从而优化了点乘运算通路,提高了并行度,最终减少了运算时间。该文在 Xilinx XC7Z020 FPGA 上实现了该点乘设计方案,完成一次点乘需要 $ 125 \mu s $。研究结果表明,与现有的设计相比,所提出的方案具有较低的面积时间积,达到了面积和性能的平衡。

In order to improve the computational efficiency of X25519 key exchange algorithm, this paper proposes an efficient point multiplication design scheme of Curve25519 based on field programmable gate array (FPGA). Firstly, on the bottom level of the finite field calculation, a modular arithmetic unit based on redundant numbers is proposed to reduce the number of reduction calculation. At the same time, the proposed structure can reduce the operation cycle of constant coefficient multiplication in point multiplication, thus optimize the path of point multiplication, improve the parallelism, and finally reduce the operation time. The design scheme of point multiplication is implemented on Xilinx XC7Z020 FPGA, it takes 125 $ \mu $s to complete a point multiplication. The results show that the proposed scheme has a lower area-time product than existing implementations, achieving a balance between area and performance.